1. Field of the Invention
The present invention relates to inspection of components (a board and a semiconductor device) constituting a bus to communicate signals between constituent components (e.g., between digital circuits including complementary metal oxide semiconductor (CMOS) elements or between functional blocks thereof) of a multiprocessor, a memory, or the like in an information processing apparatus. In shorts the present invention relates to an inspection method, an inspecting apparatus, and a program product to implement the inspection method by a computer.
The present invention further relates to a bus system including a board inspected by the board inspecting apparatus and semiconductor devices inspected by a semiconductor device inspecting apparatus, and semiconductor and semiconductor devices inspected by a semiconductor device inspecting apparatus. The present invention also relates to a manufacturing method and a manufacturing system using results of the inspection.
2. Description of Related Art
Bus systems connected to a large number of nodes-to transfer data at high speed, have been proposed as a non-contact bus wiring described in U.S. Pat. No. 5,638,402, a gap coupled bus described in EP1011039, a directional coupled bus system described in U.S. Pat. No. 09/429,441, the content of which is incorporated herein by reference, and a directional coupled bus system described in JP-A-2001-027918. FIG. 2 shows a basic system of the non-contact bus wiring described in U.S. Pat. No. 5,638,402.
In this technique, data transfers conducted between two nodes using a crosstalk generator or a directional coupler are carried out as follows. That is, data transfer between a bus master 10-1 and a slave 10-2 and data transfer between the bus master 10-1 and a slave 10-3 are respectively conducted using crosstalk between terminated wiring 1-1 and terminated wiring 1-2 and crosstalk between terminated wiring 1-1 and terminated wiring 1-3. This is suitable for data transfer between one node and a large number of nodes, e.g., between the bus master 10-1 and the slaves 10-2, 10-3. That is, the technique is suitable for data transfer between memories and a memory controller. To manufacture the bus system for users, each component of the system must be inspected.
Such components constituting a bus with use of the directional coupler mainly include a board and semiconductor devices, conventionally, these components have been inspected as follows.
(1) In manufacturing of the board, a wiring conduction check is made to detect disconnection in wiring patterns or any wrong connections between wiring lines. FIG. 6 schematically shows a “dc check”.
On a board 1, wiring is arranged to electrically connect components to be mounted on the board 1. FIG. 6 representatively shows wiring 1-a and wiring 1-b. Conventionally, a conduction/short-circuit check is used to inspect the board. The wiring 1-a and the wiring 1-b are different signal wiring lines. Pads for connecting the devices are respectively disposed on the wiring 1-a and wiring 1-b, represented by A, B, C, and D, respectively.
To check conduction of the wiring on the board of the wiring 1-a, a conduction check may be made between the pads A and B. Ordinarily, metallic check probes 7-1 and 7-2 are respectively connected to the pads A and B to measure resistance between the check probes 7-1 and 7-2. In the conduction check of the wiring 1-b, check probes 7-3 and 7-4 are similarly connected to the pads C and D to measure resistance between the check probes 7-3 and 7-4.
To inspect the board 1 for any connection between the wiring lines 1-a and 1-b to check a short, a check is made for connection between the pad A or B and the pad C or D. If the check results in high impedance, the wiring lines 1-a and 1-b are not connected to each other.
In this way, the inspection of the board 1 during the production is conducted using the check probes 7-1 to 7-4. That is, the check is made to detect a short-circuit or connection between the pads of the same signal wiring and to detect an open state or disconnection between the pads of the different signal wiring. The connection-disconnection check uses a low-frequency current or a direct current (dc) and is hence called a “dc check”.
(2) In the manufacturing process of digital data transfer semiconductor devices, an inspection of the devices is conducted to select acceptable devices before the devices are delivered to users. For the verification, a non-return to zero (NRZ) signal is used. In operation of the digital device inspecting apparatus, the apparatus is directly connected by wiring to a chip and connection therebetween is inspected by a binary signal (NRZ signal). In the inspection of a core circuit of the chip, flip-flop circuits therein are scanned by a particular signal. This is also called a boundary scanning method.